Master of Technology [M.Tech] (VLSI Design & Embedded System) From Scient Institute of Technology, Ibrahimpatnam, Hyderabad

Hyderabad, Telangana Estd 2001 JNTUH, Hyderabad Private 0
3.82 reviews

Master of Technology [M.Tech] (VLSI Design & Embedded System) Fees

57,000first year fees
2 Years DegreeOn CampusPost GraduationFull Time
Yearsyear 1year 2
Semester1234
Tution fees₹28500₹28500₹28500₹28500
Total Year Wise fees57,00057,000

Master of Technology [M.Tech] (VLSI Design & Embedded System) Important Dates


Important Events

EventDate
TS PGECET Registration Timeline
Mar 03, 2024 - May 05, 2024Ongoing
TS PGECET Admit Card Date
May 21, 2024Tentative
TS PGECET Exam Date
May 29, 2024 - Jun 01, 2024Tentative
TS PGECET Result Date
Jun 08, 2024Tentative

Expired Events

EventDate
GATE 2024 Admit Card Date
Jan 03, 2024
GATE 2024 Exam Dates
Feb 03, 2024
GATE 2024 Exam Dates
Feb 04, 2024

Important Events

EventDate
TS PGECET Registration Timeline
Mar 03, 2024 - May 05, 2024Ongoing
TS PGECET Admit Card Date
May 21, 2024Tentative
TS PGECET Exam Date
May 29, 2024 - Jun 01, 2024Tentative
TS PGECET Result Date
Jun 08, 2024Tentative

Eligibility Criteria

Candidates should have passed graduation in relevant field from recognized university.

Entrance Exam:

The Student admissions are based on the rank obtained in GATE / PG-ECET entrance tests 

Course Details

Fee Structure:

S.No

M.Tech Course

Semester

I

II

III

IV

1 Tution Fee

(Rupees)

GATE/NON-GATE Category

Rs 28,500

Rs 28,500

Rs 28,500

Rs 28,500

2 Library Fee

-

-

-

-

4 JNTU Infrastructure Fee

Rs 7500

-

Rs 5500

-

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